- Qualcomm introduces High Bandwidth Compute (HBC) memory architecture
- It leverages a hybrid design stacking LPDDR memory in a 3D space, leveraging multiple layers to essentially replace what the current generation of high-bandwidth memory (HBM4) does.
- The move, which leverages Qualcomm’s extensive experience with LPDDR, is not only power efficient, but also offers massive amounts of bandwidth and up to 768 GB of stacked memory for AI workloads.
Qualcomm is relaunching its data center ambitions, drawing on its expertise as a chip designer that excels in the low-power computing segment by focusing on an entirely new architecture: high-bandwidth computing (HPC).
The solution is a hybrid version of existing LPDDR memory that Qualcomm has successfully stacked in 3D vertical space, much like standard High Bandwidth Memory (HBM) and its latest iteration, HBM4, while delivering significant power savings along the way.
This move is possible thanks to Qualcomm offering a near-memory compute architecture that combines memory with a compute-based chip, with the former stacked vertically on top of the latter, effectively enabling up to 133 TB/s.
An AI memory offering for the future?
While the current industry standard, HBM4, is already widely used, Qualcomm’s promised offering is expected to appear by mid-2027 as part of its next-generation AI inference accelerator, the AI250.
HBC Gen 1 offers a theoretical capacity of 768 GB that HBM4 struggles to match, and Qualcomm’s published bandwidth of 133 TB/s is an achievement, given that modern HBM4 solutions offer around 3.3 TB/s per stack at the high end.
Some of these bandwidth claims might be a bit of an unfair comparison, though, because while HBM4 provides raw bandwidth, Qualcomm’s solution (and its theoretical speeds) may only be in play because it does a lot of the on-chip computing, making for an apples-to-oranges comparison in some respects.
Qualcomm, however, is scoring major victories with an AI industry increasingly obsessed with power, or rather lack thereof, to pursue many of its planned developments by touting its efficiency gains where it claims bandwidth of between 6x per watt compared to HBM for larger batches and up to 200x efficiency gains when dealing with a mix of small and large inference batches, such as coding wizards.
Qualcomm’s list of partners includes Meta and Microsoft, with the former’s multi-generational deal to use Qualcomm’s processors for AI seen as a significant win. Microsoft CEO Satya Nadela reassured investors by detailing the software giant’s partnership with the chip designer across the PC, local AI and data center segments.
As Microsoft increasingly seeks to reduce the environmental footprint of its AI data center deployment, with its CEO already reassuring stakeholders and communities that the Redmond-based tech giant aims to be mindful of the water and power footprint of currently planned and future data centers, this makes efficiency an even more important theme of late.
Qualcomm’s solution to “eliminate the HBM tax” does not exist in a vacuum, however; Competing solutions such as High Bandwidth Flash, backed by Samsung, SanDisk, and SK Hynix, also present themselves as potential competitors that focus on a low-write, high-read situation that most AI inference workloads tend to be.
Perhaps more importantly, Qualcomm’s solution and the impressive numbers it offers do not yet have independent third-party test results that could verify its claims of effectiveness, although Microsoft’s vote of confidence is seen as an important vote for one of the most important players in the mobile SoC sector as it prepares to take a piece of the growing, but increasingly competitive, data center pie over the coming decade.
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