- 512 GB of dram seems huge, but do not hold your breath for consumer availability
- The X-Dram-Dram-Dram battery of Neo sleep the sky, but the price and practicality remain clear
- AI and business systems will get speed, regular users will probably not
Neo semiconductor’s push in 3D X-Dram memory marks an ambitious attempt to rethink the DRAM design for AI and high performance IT era.
Although promises – stacked layers, improved bandwidth and reduced energy consumption – are impressive, the practicality and accessibility of consumers of these technologies remain open to the exam.
With the company which provides that its most advanced modules could reach densities of up to 512 GB, it is difficult not to ask: to whom is this memory really?
Complex architectures with an impact on limited consumers
At the heart of Neo’s approach is an architecture stacked vertically which imitates the structure of Nand 3D.
According to Neo’s own words, the table is “segmented into several sectors by vertical slits”, with “layers of lines of connected words via staircase structures”.
The company compares its Dramme X 3D density to the 48 GB of the current Planar Dram and claims to reach 512 GB, but the involvement that such capacities are walking in traditional consumer products seem to be tense.
The concept proof chips are still in the early stages. NEO is currently developing a simpler 1T0C architecture test version, with the more complex and more promising 1T1C version planned for 2026.
The variant 1T1C uses Igzo transistors associated with a cylindrical dielectric capacitor in K high in K. It promises an improvement in retention time, beyond 450 seconds, and supports stack up up to 128 layers.
With other refinements, including the addition of 5 Nm thick spacing to reduce parasitic capacity, the stack of NEO claims could exceed 512 layers.
The 3T0C design, which incorporates two Igzo layers, is oriented towards IT in memory and AI applications.
However, Neo’s declarations on the elimination of TSV need and activation up to 32k bits bus widths lift the eyebrows.
Such a bandwidth seems to be a transformative, in particular compared to the projected 2K Bits Bus width of HBM4, but the scaling of this level of performance in the real world systems is a non -trivial task.
From a broader perspective, the DRAM market has not changed significantly in terms of cost by GB over the past decade. Despite certain fluctuations, the downward trend has slowed considerably after 2012.
We could expect the MacBook Pro, for example, shipping with much more RAM by default today than ten years ago, but that did not happen.
Even with certain price reductions – DDR3 comparisons against DDR5 display a modest improvement – advances have not been revolutionary.
Product prices can fluctuate, but the global curve has flattened. The forecasts suggest that we can be near a low point before another recovery.
Thus, although 3D X-DRAM can indeed provide a larger and faster memory by 2026, it is unlikely that these 512 GB modules are available for consumers anytime soon.
More likely, such a capacity and speed will be reserved for AI servers and business systems, rather than office computers or daily laptops.
